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A look at a electronic component data sheet and setting up a FEA analysis

This particular component is very simple-nothing more than a single transistor-but the analysis techniques are very similar for all. The information we are after are the thermal characteristics shown in figure 2.

Figure 1 – general information for a transistor

Figure 2 – electrical and thermal characteristics

Items of importance are things like junction temperature, operating ambient temperature limits, thermal resistance characteristics such as theta J-a and theta J-c, representative of junction to air thermal resistance, injunction to case thermal resistance, respectively. The junction being the electronic portion contained within the case, the case, of course, is the packaging surrounding the junction.

Thetaja and thetajc are the most common resistances given. However, sometimes the data sheets don’t list any thermal resistance values. Calling the manufacturer can sometimes yield values.

The whole thermal resistance area is somewhat of a mess. Unless one knows exactly how these values were measured, it is very difficult to use them properly in an FEA model to predict junction temperature. In general the industry thinks the thetaja or thetajc provide highly accurate tools to predict junction temperatures. Among the shortfalls of this method, nothing is stated in the majority of data sheets to define how the thermal resistances were measured, that is, in were they mounted on a board? If so, what are the characteristics of the board? Number of layers? Copper content? Were power leads connected to the component only, with the component suspended in air? You get the general idea here, in order to establish any trust whatsoever with these figures we need to know how these figures were generated.

Junction to Case Method

The junction to case thermal resistance represents the temperature drop from the junction to a single side of the external case of the component when one watt is dissipated at the junction. See Mil-STD-883G, Method 1012.1.

The first step in defining a simplified model is to analyze just the component volume by itself. The goal will be to calculate a thermal conductivity that will be used with the volume in a systems model that includes the circuit card and housing.

Setting up a FEA Analysis

The figure below shows an example where the volume came in from SolidWorks. The manufacturer listed junction to case thermal resistance was given as 20 C/W.

Figure 3: Sample of Junction to Case Solid Model Method

Therefore, for the first step, is to take a model of the component volume, input 1 watt volumetric heat generation, set one side of the case to zero deg C. Then solve for temperatures in the volume. Then one adjusts the thermal conductivity of the volume to a value that produces a maximum temperature in the volume equal to the junction to case thermal resistance. For this example, the maximum temperature should be 20 deg C, the figure above shows this.

To use this single volume model in a full ANSYS model, one can now take this volume with the associated thermal conductivity and attach it to a circuit board. Then the actual component power is input in the volume. The resulting maximum temperature in the volume is an estimate of the actual maximum junction temperature.

Yes, it is not exact and there are many objections that can be raised. But the simplification approximately represents the resistance to heat flow in the actual component as measured by the junction to case thermal resistance.

Junction to air method

Figure 4 – Junction to air method

This case is not as straightforward as the junction to case temperature. The idea is the same. We want to find the “equivalent” thermal conductivity for the component volume that will show the correct temperature drop (the junction to air value) when 1 Watt is input.

Now junction to air thermal resistance is measured with a component on a low conductivity PCB. Some of the heat flows into the board and some flows out the surfaces of the component by convection.

To get started on this case, one must use a model that uses both the component and a piece of the circuit board.

A natural convection coefficient must be estimated. One can use 5.7 W/(m^2-C). Radiation to the surrounding area should be considered by adding another 4-5 w/m^2-C or by using a radiation boundary condition. A circuit board size must be used. From looking at the JEDEC spec 51-3- Low effective thermal conductivity test board for leaded surface mount packages. A very rough approximation of the board was .09 by .09 meters. Finally, one must enter the board thermal conductivity. The board is referred to as a “1S” board. Looking at the JEDEC spec 51-3, estimating copper extent at 20%, (2 oz copper), one could estimate the thermal conductivity of the board as 3.65 W/(m-C).

The component is attached to the board so that there is no contact resistance. One can then use this model with the air temperature set at zero deg C, an appropriate still air convection coefficient. This model’s thermal conductivity is then adjusted until the component volumes maximum temperature is equal to the junction to air thermal resistance. See below.

Once the proper thermal conductivity is found, the component volume can be used in the same way as the junction to case component volume. Simply glue the volume to the actual PCB, apply the real power to the component, apply the actual convection/radiation boundary conditions, and solve for the maximum temperature. This maximum temperature is then an estimate for the actual junction temperature of the structure.

Better modeling techniques for both the electronic component as well as the circuit card could improve the estimates considerably. For example, using an actual circuit card three-dimensional model, including the circuit card copper traces in all of its layers would increase the accuracy of the production. It would also provide an extremely large analytical model to solve, because the traces are extremely thin, fine, and numerous which would result in an extremely fine-mesh along these portions of the card. Estimating copper content on each layer and combining the percentage of copper along with the summer resistance of the circuit card material to provide a much simpler albeit slightly less accurate prediction of the thermal conductivity provided by the circuit card.

The component itself could be modeled with a small block or surface on its interior to represent the junction, with the heat generated at the junction and dissipated into the case, with heat conducting from the case into the circuit card and from the case into the surrounding air. Many other improvements could be made by adding further complication to the component model, such as modeling the electrical leads separately from the case, modeling the solder around the leads, modeling the internal wire traces, etc. The problem is obvious-the model could become so large and cumbersome it will take a significant amount of time and expense in order to solve. Also, imagine having to provide this level of detail for a large number of components-say 20, 30, or 40. As it is, external dimension models approximating the shape of the component and the leads along with the thermal resistances of each circuit component must be included in the model even in the simplified case discussed above.

The other critical factor is the amount of power supply to the component. In most of the analyses that I have conducted, this is never been accurately provided. For this to be provided analytically, the circuit card assembly would have to be modeled within circuit card analysis software. Otherwise, for a completed circuit card assembly the traces would have to be cut in order to measure current. There are other workarounds for this lack of information which will be discussed in a later installment.

Norman T.  Neher, P.E.
Analytical Engineering Services, Inc.
Elko New Market, MN
www.aesmn.org